<?xml version="1.0" encoding="UTF-8"?><rss version="2.0"
	xmlns:content="http://purl.org/rss/1.0/modules/content/"
	xmlns:dc="http://purl.org/dc/elements/1.1/"
	xmlns:atom="http://www.w3.org/2005/Atom"
	xmlns:sy="http://purl.org/rss/1.0/modules/syndication/"
		>
<channel>
	<title>Comments on: Peterson’s Solution on Modern Multiprocessors</title>
	<atom:link href="http://www.alper.net/programming/peterson%e2%80%99s-solution-on-modern-multiprocessors/feed/" rel="self" type="application/rss+xml" />
	<link>http://www.alper.net/hardware/peterson%e2%80%99s-solution-on-modern-multiprocessors/</link>
	<description>Eyup Alper Yoney</description>
	<lastBuildDate>Sun, 28 Aug 2011 09:14:25 +0000</lastBuildDate>
	<sy:updatePeriod>hourly</sy:updatePeriod>
	<sy:updateFrequency>1</sy:updateFrequency>
	<generator>http://wordpress.org/?v=3.2.1</generator>
	<item>
		<title>By: Alper</title>
		<link>http://www.alper.net/hardware/peterson%e2%80%99s-solution-on-modern-multiprocessors/comment-page-1/#comment-10</link>
		<dc:creator>Alper</dc:creator>
		<pubDate>Mon, 30 Aug 2010 09:42:46 +0000</pubDate>
		<guid isPermaLink="false">http://www.alper.net/?p=498#comment-10</guid>
		<description>I tested with the volatile, the test results are similar. I disassembler the code before and after the volatile, the produced codes are identical. Actually, GCC doesn&#039;t perform any optimization like keeping the values in registers. The store instruction is executed. However, two threads enter the critical section at the same time because of the store buffer and/or instruction reordering.

Regards,
Alper</description>
		<content:encoded><![CDATA[<p>I tested with the volatile, the test results are similar. I disassembler the code before and after the volatile, the produced codes are identical. Actually, GCC doesn&#8217;t perform any optimization like keeping the values in registers. The store instruction is executed. However, two threads enter the critical section at the same time because of the store buffer and/or instruction reordering.</p>
<p>Regards,<br />
Alper</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Juergen Wuebbelmann</title>
		<link>http://www.alper.net/hardware/peterson%e2%80%99s-solution-on-modern-multiprocessors/comment-page-1/#comment-9</link>
		<dc:creator>Juergen Wuebbelmann</dc:creator>
		<pubDate>Thu, 26 Aug 2010 14:38:28 +0000</pubDate>
		<guid isPermaLink="false">http://www.alper.net/?p=498#comment-9</guid>
		<description>Very interesting test and results. Just for my curiosity: have you ever tried to use the volatile attribute for the turn and interested variables? 

Regards
Juergen</description>
		<content:encoded><![CDATA[<p>Very interesting test and results. Just for my curiosity: have you ever tried to use the volatile attribute for the turn and interested variables? </p>
<p>Regards<br />
Juergen</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Vitaliy Tsvayer</title>
		<link>http://www.alper.net/hardware/peterson%e2%80%99s-solution-on-modern-multiprocessors/comment-page-1/#comment-8</link>
		<dc:creator>Vitaliy Tsvayer</dc:creator>
		<pubDate>Sun, 11 Apr 2010 16:12:18 +0000</pubDate>
		<guid isPermaLink="false">http://www.alper.net/?p=498#comment-8</guid>
		<description>Interesting topic. It reminded me of the &quot;Double-Checked Locking&quot; problem in Java related to Out-of-order writes in pre Java 5 memory model. http://www.ibm.com/developerworks/library/j-dcl.html</description>
		<content:encoded><![CDATA[<p>Interesting topic. It reminded me of the &#8220;Double-Checked Locking&#8221; problem in Java related to Out-of-order writes in pre Java 5 memory model. <a href="http://www.ibm.com/developerworks/library/j-dcl.html" rel="nofollow">http://www.ibm.com/developerworks/library/j-dcl.html</a></p>
]]></content:encoded>
	</item>
</channel>
</rss>

